• DocumentCode
    3215950
  • Title

    Introduction of Poka Yoke techniques in a bipolar fab

  • Author

    Gerbens, Al

  • Author_Institution
    Motorola Corp., Mesa, AZ, USA
  • fYear
    1990
  • fDate
    21-23 May 1990
  • Firstpage
    68
  • Lastpage
    73
  • Abstract
    The concepts of Poka Yoke (mistake-proofing) and source inspection have been applied to two digital bipolar integrated-circuit processing steps: sputter etch (prior to metal deposition) and wet etch of oxide. In both applications, the opportunities for error were identified, and error-prevention techniques were defined to eliminate the potential for error at the source. The sputter etch application involves embedding a microprocessor into an MRC-903 sputtering system. The operator interacts with the microprocessor, which provides set-up assistance and monitors the quality of the sputter etch process. Deposition of metal is not allowed if the sputter etch does not meet minimum processing specifications. The probability of defects (high-resistance via contacts) is greatly reduced: these defects could otherwise remain undetected until later electrical testing. The wet oxide etch application uses a stand-alone microcomputer to provide expert assistance to the production operator. The assistance provides help with etchant qualification, special instructions associated with difficult process requirements, location of areas to be measured, specified process control limits, and calculation of etch times. This microcomputer implementation allows the retention of a relatively complicated process sequence while minimizing the occurrence of wafer loss due to human error
  • Keywords
    bipolar integrated circuits; digital integrated circuits; etching; integrated circuit manufacture; microcomputer applications; sputter etching; MRC-903 sputtering system; Poka Yoke techniques; bipolar fab; digital bipolar integrated-circuit processing; error-prevention techniques; high-resistance via contacts; microcomputer implementation; mistake-proofing; opportunities for error; probability of defects; processing specifications; source inspection; sputter etch; wet etch of oxide; Contacts; Inspection; Microcomputers; Microprocessors; Production; Qualifications; Sputter etching; Sputtering; Testing; Wet etching;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Semiconductor Manufacturing Science Symposium, 1990. ISMSS 1990., IEEE/SEMI International
  • Conference_Location
    Burlingame, CA
  • Type

    conf

  • DOI
    10.1109/ISMSS.1990.66112
  • Filename
    66112