A source-line programming scheme for low voltage operation NAND flash memories

The increasing demand for low voltage/low power portable equipment in the consumer marketplace has created a need for a low voltage/low power flash memory. In portable communication products, sub-1.8 V operation is essential. In view of the chip cost, a NAND-type cell has a big advantage over a NOR-type cell due to its smaller cell size. However, in this paper we show for the first time that the conventional NAND flash memory cannot operate below 2.0 V due to a program disturb issue. To solve this problem, we propose a new programming scheme which drastically reduces the program disturb and realizes highly reliable, high-speed programming, low voltage operation, low power consumption and low cost NAND flash memories.