• DocumentCode
    3216251
  • Title

    MOGAC: a multiobjective genetic algorithm for the co-synthesis of hardware-software embedded systems

  • Author

    Dick, R.P. ; Jha, N.K.

  • Author_Institution
    Dept. of Electr. Eng., Princeton Univ., NJ, USA
  • fYear
    1997
  • fDate
    9-13 Nov. 1997
  • Firstpage
    522
  • Lastpage
    529
  • Abstract
    We present a hardware-software co-synthesis system, called MOGAC, that partitions and schedules embedded system specifications consisting of multiple periodic task graphs. MOGAC synthesizes real-time heterogeneous distributed architectures using an adaptive multiobjective genetic algorithm that can escape local minima. Price and power consumption are optimized while hard real-time constraints are met. MOGAC places no limit on the number of hardware or software processing elements in the architectures it synthesizes. Our general model for bus and point-to-point communication links allows a number of link types to be used in an architecture. Application-specific integrated circuits consisting of multiple processing elements are modeled. Heuristics are used to tackle multi-rate systems, as well as systems containing task graphs whose hyperperiods are large relative to their periods. The application of a multiobjective optimization strategy allows a single co-synthesis run to produce multiple designs which trade off different architectural features. Experimental results indicate that MOGAC has advantages over previous work in terms of solution quality and running time.
  • Keywords
    application specific integrated circuits; formal specification; genetic algorithms; high level synthesis; real-time systems; MOGAC; application-specific integrated circuits; bus links; embedded system specifications; hardware-software co-design; hardware-software co-synthesis system; hardware-software embedded system co-synthesis; hyperperiods; link types; multi-rate systems; multiobjective genetic algorithm; multiple periodic task graphs; partitioning; point-to-point communication links; power consumption optimisation; price optimisation; real-time heterogeneous distributed architectures; High-level synthesis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Design, 1997. Digest of Technical Papers., 1997 IEEE/ACM International Conference on
  • Conference_Location
    San Jose, CA, USA
  • ISSN
    1092-3152
  • Print_ISBN
    0-8186-8200-0
  • Type

    conf

  • DOI
    10.1109/ICCAD.1997.643589
  • Filename
    643589