Title :
CMOS 10 MHz-IF downconverter with on-chip broadband circuit for large image-suppression
Author :
Behbahani, F. ; Kishigami, Y. ; Leete, J. ; Abidi, A.A.
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Abstract :
A highly selective superheterodyne radio receiver has so far defied complete integration because it is difficult to adequately reject the image with only on-chip circuits. Practical quadrature downconversion mixers, limited by gain mismatch and phase inaccuracy, usually reject the image by no more than 35 dB or so. This may be good enough in a low intermediate frequency (IF) receiver for certain cellular systems such as GSM or DECT, because the base station limits the relative power of the adjacent channels comprising the image. However, in non-cellular or unregulated ISM bands the adjacent channel level, and therefore the strength of the image, is relatively unconstrained. This paper describes a circuit that rejects the image by almost 60 dB over two octaves of frequency centered at 10 MHz with no need for adjustment or tuning. It is intended for use in a fully integrated low-IF superheterodyne receiver. The prototype circuit is implemented in 0.6 /spl mu/m CMOS.
Keywords :
CMOS analogue integrated circuits; adjacent channel interference; frequency convertors; interference suppression; mixers (circuits); radiofrequency filters; superheterodyne receivers; 0.6 micron; 10 MHz; CMOS IF downconverter; adjacent channel level; large image-suppression; low-IF superheterodyne receiver; noncellular bands; onchip broadband circuit; polyphase filter; unregulated ISM bands; Base stations; Circuit optimization; Filtering; Frequency; GSM; Passive filters; Prototypes; Receivers; Resistors; Switches;
Conference_Titel :
VLSI Circuits, 1999. Digest of Technical Papers. 1999 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
4-930813-95-6
DOI :
10.1109/VLSIC.1999.797244