An effective method to fabricate implantable electronic test models before microelectronic design

This research investigates the development of a cost-effective method to evaluate implantable bio-electronic devices before VLSI design which usually requires multiple design iterations with considerable cost. A method is developed to modify commercially available laboratory based circuit board development techniques and shrink the prototype to implantable dimensions. This method enables evaluation of prototype devices without the cost and delay of VLSI fabrication-runs.