Implementation of a VC-merge capable crossbar switch on MPLS over ATM

Author

Dong-Won Lee ; Tae-Won Lee ; Kim, Young-Chul ; Choi, Deok-Jai ; Lee, Dong-Won

Author_Institution

Dept. of Electron. Eng., Chonnam Nat. Univ., Kwangju, South Korea

fYear

2001

fDate

2001

Firstpage

66

Lastpage

69

Abstract

Recently, as the Internet and its services grow rapidly, a new switching mechanism, MPLS (multiprotocol label switching), has been introduced by IETF. In this paper, we propose a scalable hardware architecture for a high-speed crossbar switch capable of VC-merging in MPLS networks. A scheduler configuring the crossbar switch in input-queued fashion has been designed and implemented. The switch has MIQs (multiple input queues) at input ports. In the designed switch, there are eight VC-merge capable modules, one for each output port. The proposed architecture is modeled in VHDL, synthesized on SYNOPSYS, and fabricated using the SAMSUNG 0.5 μm SOG process

Keywords

asynchronous transfer mode; electronic switching systems; queueing theory; scheduling; telecommunication equipment; 0.5 micron; ATM; IETF; Internet; MPLS; SAMSUNG SOG process; SYNOPSYS; VC-merge capable crossbar switch; VHDL; input-queued fashion; multiple input queues; multiprotocol label switching; scalable hardware architecture; scheduler; Asynchronous transfer mode; Communication switching; Hardware; Merging; Multiprotocol label switching; Switches; Telecommunication traffic; Traffic control; Virtual colonoscopy; Web and internet services;

fLanguage

English

Publisher

ieee

Conference_Titel

ATM (ICATM 2001) and High Speed Intelligent Internet Symposium, 2001. Joint 4th IEEE International Conference on

Conference_Location

Seoul

Print_ISBN

0-7803-7093-7

Type

conf

DOI

10.1109/ICATM.2001.932058

Filename

932058