A low power 10 Gbps voltage mode output driver with good return loss performance

This paper describes a new topology and implementation of a 10 Gbps voltage mode output driver designed for high speed data transfer applications. Using a positive feedback technique, the low power driver achieves the proper internal chip impedance required for matching the line impedance. As a result, return loss is minimized and good signal integrity is achieved. The driver, which consists of a pre-driver and an output stage, consumes a total of 17mW at speed power and S22 return loss performance better than -15dB. It provides a single ended output swing of 400mV. In measurements, the driver, which was a part of an equalizer chip, achieved peak to peak jitter of 11psec at 10Gbps. The chip is fabricated in a standard 2.5V/1.2V SiGe BiCMOS technology with 100 GHz peak f_t, and packaged in a commercial LLP package.