Phase Noise Performances of a Cross-Coupled CMOS VCO with Resistor Tail Biasing

The voltage controlled oscillator (VCO) is a fundamental block in RF IC architectures. Today´s wireless communication applications do require a high level of performances from such a circuit, and specifically its phase noise figure and its power consumption. In fact, modern standards often demand for phase noise level better than -95 dBc/Hz at 100 KHz in the vast majority of cases, with supply voltages approaching the 1 V range. This paper presents the design challenges of a cross-coupled 1.8 GHz CMOS voltage controlled oscillator with a tuning range of 7%, and a phase noise figure of -113 dBc/Hz at an offset frequency of 100 KHz. It employs a resistor for biasing, avoiding in this way the common tail current source based on active circuitry (e.g. current mirrors in CMOS designs). This choice prevents the 1/f device noise upconversion, leading to an improved spectral purity. Since phase noise also varies with the reciprocal of the tail current, a trade-off can be established between noise performances and power consumption by simply changing the biasing resistor. The same circuit topology may thus be useful for building VCOs whose applications range from high performance wireless standards where an extremely low phase noise is mandatory, to low-cost portable systems where the reduced power drain is of major concern