DocumentCode
322036
Title
Simultaneous code execution and data storage in a single flash memory chip for real time wireless communication systems
Author
Brown, Charles ; Hasbun, Robert
Author_Institution
Intel Corp., Folsom, CA, USA
Volume
2
fYear
1997
fDate
3-6 Aug 1997
Firstpage
740
Abstract
A cost-effective, flexible approach to emulating electrically erasable programmable read only memory (EEPROM) in flash memory is presented. New low latency suspend/resume circuitry combined with flash media management software is introduced to enable simultaneous code and data storage; thus eliminating system EEPROM memory, reducing system data write time, and lowering memory system cost and power consumption. This new method eliminates the need for specialized hardware circuits in flash memory that are required to simultaneously read code, while writing or erasing data from an independent address partition. Flash data integrator (FDI) media management software architecture is presented for data storage in a GSM cellular phone application, and is shown to offer a more flexible solution than a specialized hardware approach
Keywords
EPROM; cellular radio; integrated memory circuits; real-time systems; storage management; telecommunication computing; EEPROM; GSM cellular phone application; flash data integrator; flash media management software; flash memory chip; low latency suspend/resume circuitry; power consumption reduction; real time wireless communication systems; simultaneous code execution/data storage; software architecture; Circuits; Costs; Delay; EPROM; Energy management; Flash memory; Hardware; Memory management; Power system management; Resumes;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on
Conference_Location
Sacramento, CA
Print_ISBN
0-7803-3694-1
Type
conf
DOI
10.1109/MWSCAS.1997.662181
Filename
662181
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