Title :
Code-disjoint circuits for parity codes
Author :
Hartje, Hendrik ; Sogomonyan, Egor S. ; Gössel, Michael
Author_Institution :
Univ. of Potsdam, Germany
Abstract :
In this paper it is shown how a circuit, given as a netlist of gates, can be transformed into two different types of code-disjoint circuits. A new method for a joint design of the functional circuit, the output parity and the input parity is proposed. Carefully selected internal nodes of the functional circuit are utilized to reduce the necessary area overhead for the design of input and output parities
Keywords :
combinational circuits; design for testability; error detection codes; fault location; logic design; logic testing; MCNC benchmark circuit; area overhead; code-disjoint circuits; functional circuit; input parities; joint design; output parities; parity codes; synthesis; Boolean functions; Built-in self-test; Circuit faults; Circuit synthesis; Combinational circuits; Electrical fault detection; Fault detection; Fault tolerance; Logic design; Monitoring;
Conference_Titel :
Test Symposium, 1997. (ATS '97) Proceedings., Sixth Asian
Conference_Location :
Akita
Print_ISBN :
0-8186-8209-4
DOI :
10.1109/ATS.1997.643929
