Title :
Feasible regions quantify the probabilistic configuration power of arrays with multiple fault types
Author :
LaForge, Laurence E.
Author_Institution :
Embry-Riddle Aeronaut. Univ., Fallon Naval Air Station, NV, USA
Abstract :
The bulk of results for the performance of configuration architectures treat the case of failed processor, but neglect switches that are stuck open or closed. By contrast, the present work characterizes this multivariate problem in the presence of either independent and identically distributed (iid) or clustered faults. Suppose that the designer wishes to assure, with high probability, a fault-free s×t array. If local sparing is used then, as we report, the resulting area is (i) Θ(st log st) in the presence of faulty elements or faulty elements and switches stuck open; (ii) Θ(st log 2 st) in the presence of faulty elements and switches stuck closed; (iii) Θ([st]2 log st) in the presence of faulty elements and switches that may be either stuck open or stuck closed. We also furnish bounds on maximum wirelength and an optimal configuration algorithm
Keywords :
failure analysis; fault diagnosis; fault tolerant computing; multiprocessor interconnection networks; probability; reconfigurable architectures; redundancy; systolic arrays; clustered faults; configuration architectures; fault-free array; independent/identically distributed faults; maximum wirelength bounds; multiple fault types; multivariate problem; optimal configuration algorithm; probabilistic configuration power; processor arrays; stuck closed switches; stuck open switches; Algorithm design and analysis; Cost function; Fault diagnosis; Fault tolerance; Hypercubes; Redundancy; Switches; Testing; Wires;
Conference_Titel :
Innovative Systems in Silicon, 1996. Proceedings., Eighth Annual IEEE International Conference on
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-3639-9
DOI :
10.1109/ICISS.1996.552437