DocumentCode
3221057
Title
Onboard FPGA-based SAR processing for future spaceborne systems
Author
Le, Charles ; Chan, Samuel ; Cheng, Frank ; Fang, Winston ; Fischman, Mark ; Hensley, Scott ; Johnson, Robert ; Jourdan, Michael ; Marina, Miguel ; Parham, Bruce ; Rogez, Francois ; Rosen, Paul ; Shah, Biren ; Taft, S.
Author_Institution
Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA
fYear
2004
fDate
26-29 April 2004
Firstpage
15
Lastpage
20
Abstract
We present a real-time high-performance and fault-tolerant FPGA-based hardware architecture for the processing of synthetic aperture radar (SAR) images in future spaceborne systems. In particular, we discuss the integrated design approach, from top-level algorithm specifications and system requirements, design methodology, functional verification and performance validation, down to hardware design and implementation.
Keywords
fault tolerant computing; field programmable gate arrays; radar signal processing; space vehicle electronics; spaceborne radar; synthetic aperture radar; FPGA-based implementation; SAR; fault-tolerant processing; functional verification; integrated design method; onboard FPGA-based SAR processing; performance validation; real-time processing; spaceborne systems; synthetic aperture radar images; system requirements; top-level algorithm specifications; Computer architecture; Fault tolerant systems; Hardware; Laboratories; Propulsion; Real time systems; Signal processing algorithms; Space technology; Spaceborne radar; Synthetic aperture radar;
fLanguage
English
Publisher
ieee
Conference_Titel
Radar Conference, 2004. Proceedings of the IEEE
Print_ISBN
0-7803-8234-X
Type
conf
DOI
10.1109/NRC.2004.1316388
Filename
1316388
Link To Document