DocumentCode
3221541
Title
Digital hardware organization course for SoC program
Author
Ellervee, Peeter ; Tenhunen, Hannu
Author_Institution
Dept. of Comput. Eng., Tallinn Tech. Univ., Estonia
fYear
2001
fDate
17-18 June 2001
Firstpage
26
Lastpage
27
Abstract
In this paper we describe our approach towards the second level digital techniques course suited for System-on-Chip (SoC) oriented curriculum. Due to enhanced utilization of synthesis techniques and higher level block-oriented design, new requirements for digital hardware design are set up. Our working hypothesis is that the course focus needs to be in a systematic working set based on general transformation and refinements are more important than a presentation of detailed and specific target solutions. Thus the student should master the methodology and understand the underlying principles, which will enable him or her, to utilize more effectively the advanced VHDL synthesis techniques, which are covered in the follow-up course.
Keywords
application specific integrated circuits; circuit CAD; educational courses; electronic engineering education; hardware description languages; integrated circuit design; logic CAD; SoC program; VHDL synthesis techniques; block-oriented design; curriculum; digital hardware organization course; second level digital techniques course; synthesis techniques; systematic working set; Design engineering; Digital systems; Electronic mail; Hardware; Integrated circuit synthesis; Integrated circuit technology; Laboratories; Logic; Microelectronics; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Systems Education, 2001. Proceedings. 2001 International Conference on
Print_ISBN
0-7695-1156-2
Type
conf
DOI
10.1109/MSE.2001.932402
Filename
932402
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