FPGA integrated co-design

The main problem in hardware/software co-design is how to design an embedded system that contains both hardware in the form of FPGAs or ASICs and a microprocessor for which software must be written. A critical decision that has a profound effect on overall system cost is how to partition the system into its hardware and software components. A mistake made in this decision, which must be corrected by reworking the entire design, can add significant delay and cost to the design process. The longer the irrevocable decision of how to partition the hardware and software can be delayed, the better is the chance to keep overall system cost to a minimum. This paper describes an approach that has been tested in a graduate course on FPGA design that will allow the hardware/software partition decision to be delayed to the very end of the design process.