FPGA implementation and simulink integration of CFO module in WiMAX receiver model

Carrier Frequency Offset (CFO) estimation and correction is a critical issue in all OFDM receivers. For WiMAX Physical layer it is even more challenging to introduce a suitable CFO sub-system since WiMAX system supports complex features for future applications such as multiuser, multi-access and high mobility operation. This paper is concerned with low cost hardware implementation of CFO sub-system on field programmable gate array (FPGA) which fits in WiMAX system specifications. CFO algorithm and its basic building blocks description have been introduced. For FPGA implementation, an optimized CORDIC module has been used for estimation/correction steps. The design has been prototyped on an XC3S200A device in Spartan-3A Platform using ISE 10.1 all in one design suit from Xilinx. Synthesis results, floorplan mapping and testbench waveforms have been reported. Developing and validating the algorithm in VHDL and simulation phases have been explained. WiMAX transmitter/receiver system and CFO sub-system have been modeled and simulated in MATLAB/SIMULINK tools. Bit Error Rate (BER) versus signal to noise ratio graphs have been plotted for QAM and QPSK modulations.