DocumentCode
3222713
Title
A design for software defined M-PSK radio on FPGA for low SNRs and symbol rates upto 10MS/s
Author
Velkuru, Vinay Kumar ; Samant, Abhay
fYear
2011
fDate
16-18 Nov. 2011
Firstpage
574
Lastpage
578
Abstract
In this paper we present an architecture for a software defined M-PSK (M=2, 4, 8) receiver which was prototyped to handle real world satellite signals of Eb/N0 up to 4dB for BPSK and QPSK and up to 6dB for 8-PSK using only 2 samples per symbol. This design supports symbol rates between 32kS/s and 10MS/s. We also present the BER curves of the demodulator designed and the approach we took to obtain them. This infrastructure is scalable to any kind of real time software radio development and aids rapid development on FPGA.
Keywords
demodulators; error statistics; field programmable gate arrays; quadrature phase shift keying; satellite communication; software radio; BER curve; BPSK; FPGA; QPSK; demodulator design; low SNR; satellite signals; software defined M-PSK radio; Bit error rate; Field programmable gate arrays; Frequency estimation; Nickel; Phase shift keying; Receivers; Timing; AWGN; BER; M-PSK; all digital receiver; reconfigurable; satellite communication; software radio;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal and Image Processing Applications (ICSIPA), 2011 IEEE International Conference on
Conference_Location
Kuala Lumpur
Print_ISBN
978-1-4577-0243-3
Type
conf
DOI
10.1109/ICSIPA.2011.6144169
Filename
6144169
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