Statistical parameter control for optimum design and manufacturability of VLSI circuits

A first-order statistical worst-case design methodology for VLSI products that is based on uncorrelated groups of geometry- and temperature-independent design parameters has been developed. The parameters are statistically monitored in production by extending in-line SPC (statistical process control) to PCM results. Key groups of design parameters are identified by means of a complete sensitivity analysis (including second-order terms and cross terms if necessary) on the performance parameters within the parameter windows. An estimate of the 3-σ performance limits is then readily derived from the results of the sensitivity analysis. The uncorrelated groups of geometry- and temperature-independent design parameters have been found to be an optimum interface between process and design, making statistical design possible in a very cost-effective way. Experimental qualification of the method is discussed based on development and production data of a high-speed 1.2-μm 64 K CMOS SRAM