Cycle time metrics for R&D semiconductor wafer fabrication

Author

Pierce, Neal G. ; Yost, Alan

Author_Institution

Adv. Products Res. & Dev. Lab., Motorola Inc., Austin, TX, USA

fYear

1995

fDate

13-15 Nov 1995

Firstpage

105

Lastpage

110

Abstract

This paper presents a case study for the successful development and effective use of cycle time metrics for fabricating semiconductor wafers in a research and development (R&D) environment. The metrics include multiples of theoretical cycle time (MTCT), breakdown analysis of cycle time, and cumulative queue times of baseline processes. Each of these metrics was applied to equipment types, process recipes, and overall pilot line performance as well as to production areas such as Films, Implant, and Etch.

Keywords

research and development management; semiconductor device manufacture; R&D semiconductor wafer fabrication; baseline processes; breakdown analysis; cumulative queue times; cycle time metrics; equipment types; etch; films; implant; multiples of theoretical cycle time; pilot line; process recipes; production; research and development; Electric breakdown; Etching; Fabrication; Implants; Job shop scheduling; Laboratories; Manufacturing processes; Queueing analysis; Research and development; Semiconductor device manufacture;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced Semiconductor Manufacturing Conference and Workshop, 1995. ASMC 95 Proceedings. IEEE/SEMI 1995

ISSN

1078-8743

Print_ISBN

0-7803-2713-6

Type

conf

DOI

10.1109/ASMC.1995.484350

Filename

484350