DocumentCode
3224438
Title
A Clock Synchronization Strategy for Minimizing Clock Variance at Runtime in High-End Computing Environments
Author
Jones, Terry ; Koenig, Gregory A.
Author_Institution
Oak Ridge Nat. Lab., Oak Ridge, TN, USA
fYear
2010
fDate
27-30 Oct. 2010
Firstpage
207
Lastpage
214
Abstract
We present a new software-based clock synchronization scheme that provides high precision time agreement among distributed memory nodes. The technique is designed to minimize variance from a reference chimer during runtime and with minimal time-request latency. Our scheme permits initial unbounded variations in time and corrects both slow and fast chimers (clock skew). An implementation developed within the context of the MPI message passing interface is described and time coordination measurements are presented. Among our results, the mean time variance among a set of nodes improved from 20.0 milliseconds under standard Network Time Protocol (NTP) to 2.29 μsecs under our scheme.
Keywords
clocks; distributed memory systems; message passing; parallel processing; protocols; synchronisation; time measurement; MPI message passing; clock variance minimization; distributed memory; high end computing; minimal time request latency; reference chimer; software based clock synchronization; standard network time protocol; Clocks; Computational modeling; Jitter; Protocols; Servers; Synchronization; System software; MPI; Time service; clock synchronization; programming tools; supercomputing; system software;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Architecture and High Performance Computing (SBAC-PAD), 2010 22nd International Symposium on
Conference_Location
Petropolis
ISSN
1550-6533
Print_ISBN
978-1-4244-8287-0
Electronic_ISBN
1550-6533
Type
conf
DOI
10.1109/SBAC-PAD.2010.33
Filename
5644949
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