DocumentCode
3224739
Title
Feedback-Driven Restructuring of Multi-threaded Applications for NUCA Cache Performance in CMPs
Author
Bartolini, Sandro ; Foglia, Pierfrancesco ; Solinas, Marco ; Prete, Cosimo Antonio
Author_Institution
Dipt. di Ing. dell´´Inf., Univ. degli studi di Siena, Siena, Italy
fYear
2010
fDate
27-30 Oct. 2010
Firstpage
87
Lastpage
94
Abstract
This paper addresses feedback-directed restructuring techniques tuned to Non Uniform Cache Architectures (NUCA) in CMPs running multi-threaded applications. Access time to NUCA caches depends on the location of the referred block, so the locality and cache mapping of the application influence the overall performance. We show techniques for altering the distribution of applications into the cache space as to achieve improved average memory access time. In CMPs running multi-threaded applications, the aggregated accesses (and locality) of the processors form the actual cache load and pose specific issues. We consider a number of Splash-2 and Parsec benchmarks on an 8 processor system and we show that a relatively simple remapping algorithm is able to improve the average Static-NUCA (SNUCA) cache access time by 5.5% and allows an SNUCA cache to surpass the performance of a more complex dynamic-NUCA (DNUCA) for most benchmarks. Then, we present a more sophisticated remapping algorithm, relying on cache geometry information and on the access distribution statistics from individual processors, that reduces the average cache access time by 10.2% and is very stable across all benchmarks.
Keywords
cache storage; memory architecture; multi-threading; multiprocessing systems; statistics; NUCA; access distribution statistics; cache geometry information; cache load; cache mapping; cache space; feedback directed restructuring technique; memory access time; multithreaded application; nonuniform cache architecture; parsec benchmark; processor system; remapping algorithm; splash 2; Arrays; Benchmark testing; Equations; Mathematical model; Oceans; Optimization; Program processors; CMPs; Feedback-directed optimizations; NUCA caches; compiler optimizations; multi-threaded applications;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Architecture and High Performance Computing (SBAC-PAD), 2010 22nd International Symposium on
Conference_Location
Petropolis
ISSN
1550-6533
Print_ISBN
978-1-4244-8287-0
Electronic_ISBN
1550-6533
Type
conf
DOI
10.1109/SBAC-PAD.2010.20
Filename
5644962
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