DocumentCode :
3224899
Title :
Design of novel full-load stabilized low dropout regulator with high PSRR
Author :
Suo, David ; Pan, Jun ; Hu, Yonggui ; Li, Kaicheng
Author_Institution :
SISC, CETC, Chongquing, China
fYear :
2009
fDate :
25-27 Dec. 2009
Firstpage :
388
Lastpage :
391
Abstract :
In this paper, a method which uses impedance match to improve Power Noise Rejection Ratio (PSRR) of low dropout voltage regulator (LDO) and to make robust frequency compensation is put forward. Based on the method, a novel LDO is designed. The simulation results are as follows. PSRR>80dB@10kHz, the load regulation at 0-250mA is less than 15mV, and an external capacitor of more than 0.8uF can realize full-load stabilization (the ripple in the worst case is less than 100mV).
Keywords :
impedance matching; voltage regulators; capacitor; current 0 mA to 250 mA; full load stabilization; impedance match; low dropout voltage regulator; power noise rejection ratio; robust frequency compensation; Regulators; LDO; PSRR; full load stability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices and Solid-State Circuits, 2009. EDSSC 2009. IEEE International Conference of
Conference_Location :
Xi´an
Print_ISBN :
978-1-4244-4297-3
Electronic_ISBN :
978-1-4244-4298-0
Type :
conf
DOI :
10.1109/EDSSC.2009.5394234
Filename :
5394234
Link To Document :
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