A digital calibration design for 10-bit folding and interpolating ADC

A new digital pre-calibration scheme for 10-bit folding and interpolating ADC is presented in this paper. A way of bidirectional searching for zero-crossing points is introduced; the scheme could calibrate the drift of zero-crossing rising from the offset of all stages in quantization path. The calibration stage consists of 6-bit current scaling DACs embedded in 36 differential amplifiers, and a digital controller, realizing the functions of calibration circulation, "interruption" processing, and "broken point" recovery. When the presented calibrator is used in folding and interpolating ADC, simulation results show that the ADC can achieves 10-bit 250 MS/s in SMIC 0.18 ¿m process.