Title :
Signal integrity and EMC performance enhancement using 3D integrated circuits - A case study
Author :
Sicard, Etienne ; Wu Jian-fei ; Li Jian-cheng
Author_Institution :
INSA, Univ. of Toulouse, Toulouse, France
Abstract :
In this paper, the signal integrity (SI) and Electromagnetic Compatibility (EMC) performance of a microcontroller and memory are simulated in 2D and 3D assembly versions. Three types of configurations are investigated: conventional 2D routing on printed-circuit-board, stacked dies with wire bonding and stacked dies with Through-Silicon-Via (TSV). The study addresses signal integrity of the memory bus and the conducted emission of the microcontroller. An equivalent bus model is presented for order reduction and improved simulation efficiency. The benefits of 3D integration are highlighted, in terms of improved eye diagram and one decade reduction in parasitic emission.
Keywords :
SRAM chips; assembling; electromagnetic compatibility; integrated circuit modelling; lead bonding; microcontrollers; printed circuits; three-dimensional integrated circuits; 2D assembly version; 3D assembly version; 3D integrated circuits; 3D integration; EMC performance enhancement; SRAM memory; TSV; conducted emission; conventional 2D routing; electromagnetic compatibility; equivalent bus model; improved eye diagram; improved simulation efficiency; memory bus; microcontroller; one-decade reduction; order reduction; parasitic emission; printed circuit board; signal integrity; stacked dies; through-silicon-via; wire bonding; Electromagnetic compatibility; Integrated circuit interconnections; Integrated circuit modeling; Microcontrollers; Three-dimensional displays; Through-silicon vias; 1 Ω/150 Ω; 3D ICs; EMC; Emission; Equivalent bus model; IC Strip line; Microcontroller and memory; Signal integrity;
Conference_Titel :
Electromagnetic Compatibility of Integrated Circuits (EMC Compo), 2013 9th Intl Workshop on
Conference_Location :
Nara
DOI :
10.1109/EMCCompo.2013.6735164
