DocumentCode
3225405
Title
Substrate noise reduction based on impedance balance using tunable resistances
Author
Nakamura, A. ; Maeda, Munenori ; Matsushima, Takaaki ; Wada, O.
Author_Institution
Renesas Electron., Kodaira, Japan
fYear
2013
fDate
15-18 Dec. 2013
Firstpage
33
Lastpage
36
Abstract
Substrate noise coupling from digital circuits causes degradation of performance of analog circuits on the same LSI chip. Generally large area on the chip is necessary to reduce the substrate coupling. In this paper, a proposed method eliminates the substrate coupling by extension of the impedance balance control technique which was proposed by the authors. The impedance balance condition on the LSI chip is satisfied by tunable resistances inserted into the substrate contacts. Even if the substrate coupling between two circuits is low (for example, 70 Ω,) the substrate noise coupling was reduced enough on the condition of impedance balance.
Keywords
circuit tuning; electric impedance; large scale integration; noise; substrates; LSI chip; impedance balance; substrate coupling; substrate noise reduction; tunable resistances; Analog circuits; Couplings; Digital circuits; Impedance; Integrated circuit modeling; Large scale integration; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Electromagnetic Compatibility of Integrated Circuits (EMC Compo), 2013 9th Intl Workshop on
Conference_Location
Nara
Type
conf
DOI
10.1109/EMCCompo.2013.6735168
Filename
6735168
Link To Document