Design of neuromorphic logic networks and fault-tolerant computing

This paper studies robust fault-tolerant neuromorphic computing to support enabling application-specific design and enable emerging nanoscaled microelectronics. We develop an energy-centric probabilistic design concept and propose a library of neuromorphic networks for logic functions. These developments enable robustness, failure tolerance capabilities, adaptation and reconfiguration of complex large-scale networks. The proposed methods and tools in design of neuromorphic networks are verified for unreliable, defective, faulty and failed interconnect and cells which may operate under large perturbations.