Practical comparison of differential power analysis techniques on an ASIC implementation of the AES algorithm

Attackers can reveal the secret key stored in an electronic cryptographic device from the instantaneous power consumption using statistical analysis. The technique used to attack such devices by monitoring the power consumption is called Differential Power Analysis (DPA). To date, two variants of the basic DPA attack have been developed, which are Correlation Power Analysis (CPA) and Differential Frequency-based Analysis (DFA). In this research DPA, CPA and DFA attacks are performed on an Application Specific Integrated Circuit (ASIC) implementation of the Advanced Encryption Standard (AES) algorithm using a Side-channel Attack Standard Evaluation Board (SASEBO-R). SASEBO-R is a circuit board that contains an ASIC cryptographic device and which was specifically designed with features to perform DPA attacks. In this paper improved DPA and DFA techniques are proposed to reduce the time complexity of both attacks as well as the number of samples required to reveal the secret key. Finally, a comparison between all of the attacks is provided in terms of both time complexity and effectiveness.