Configurable computing: how to deliver the promise!

Summary form only given. Configurable computing ideas are being explored to design high performance systems for many applications. Devices which provide partial reconfigurability of combinational logic are now in the market. Future devices which provide dynamic reconfigurability of both combinational logic and interconnection network based on intermediate results promise enormous computational power. To realize the inherent potential of this technology we need algorithmic techniques and tools which exploit the hardware in a non trivial manner. Characteristics of future devices also need to be explored. Current approaches to design configurable solutions are largely based on logic synthesis in which an HDL description is statically compiled onto hardware. Using such an automated synthesis approach is not amenable to designing solutions which analyze the run time behavior of applications and exploit dynamic reconfiguration