Non-binary SAR ADC with digital error correction for low power applications

This paper describes techniques for creating a low-power SAR ADC with an error-correcting non-binary successive approximation algorithm; it is suitable for low power applications, performs digital error correction, and does not require analog calibration. Two techniques have been proposed for implementing low-power SAR ADCs: use of two comparators, and a charge-sharing architecture. However these techniques would normally require analog calibration of comparator offsets. Here we propose a non-binary SA algorithm that compensates for comparator offset effects in the digital domain, and so eliminates the need for analog calibration. Results of our Matlab simulation validate the effectiveness of this approach.