Background calibration algorithm for pipelined ADC with open-loop residue amplifier using split ADC structure

This paper describes a background calibration algorithm for a pipelined ADC with an open-loop amplifier using a Split ADC structure. The open-loop amplifier is employed as a residue amplifier in the first stage of the pipelined ADC to realize low power and high speed. However it suffers from nonlinearity, and hence needs calibration; conventional background calibration methods take a long time to converge. We investigated the split ADC structure for background calibration of the residue amplifier nonlinearity and gain error as well as the DAC nonlinearity all together with fast convergence, and validated its effectiveness by MATLAB simulation.