DocumentCode :
3227560
Title :
Research and Realization of Digital Circuit Fault Probe Location Process
Author :
Su Wei ; Zhang Shide ; Xue Lijun
Author_Institution :
Beijing Union Univ., Beijing
Volume :
2
fYear :
2008
fDate :
20-22 Oct. 2008
Firstpage :
897
Lastpage :
900
Abstract :
This paper presents three core files relating to circuit fault diagnosis which is generated by LASAR (logic automated stimulus response), i.e. fault dictionary, node truth table and pin connection table, analyses the content of fault dictionary, pin connection table and node truth table, finds the necessary information for fault location, summarizes the procedure of circuit test and fault location. Finally the digital circuit diagnosis system which can locate the fault on the pin of components is designed. With the help of probe, fault location of component pins can be accurately pinpointed.
Keywords :
circuit reliability; digital circuits; fault diagnosis; circuit fault diagnosis; circuit test; digital circuit diagnosis system; digital circuit fault probe location process; fault dictionary; logic automated stimulus response; node truth table; pin connection table; Circuit faults; Circuit testing; Dictionaries; Digital circuits; Fault diagnosis; Fault location; Information analysis; Logic circuits; Logic testing; Probes; LASAR; fault diagnosis; fault dictionary;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Intelligent Computation Technology and Automation (ICICTA), 2008 International Conference on
Conference_Location :
Hunan
Print_ISBN :
978-0-7695-3357-5
Type :
conf
DOI :
10.1109/ICICTA.2008.361
Filename :
4659892
Link To Document :
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