DocumentCode :
3228697
Title :
Multi-purpose neuro-architecture with memristors
Author :
Ebong, Idongesit ; Deshpande, Durgesh ; Yilmaz, Yalcin ; Mazumder, Pinaki
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Univ. of Michigan, Ann Arbor, MI, USA
fYear :
2011
fDate :
15-18 Aug. 2011
Firstpage :
431
Lastpage :
435
Abstract :
An analog CMOS neuromorphic design utilizing spike timing dependent plasticity and memristor synapses is investigated for use in building a multi-purpose analog neuromorphic chip. In order to obtain a multi-purpose chip, a suitable architecture is established and several functions with the proposed architecture are shown. Using the IBM 90 nm CMOS9RF process, neurons are designed to interface with Verilog-A memristor synapse models to perform the XOR and Edge Detection functions.
Keywords :
CMOS analogue integrated circuits; memristors; CMOS9RF process; Verilog-A memristor synapse models; XOR; analog CMOS neuromorphic design; edge detection; multipurpose analog neuromorphic chip; multipurpose neuro-architecture; size 90 nm; spike timing dependent plasticity; CMOS integrated circuits; Computer architecture; Image edge detection; Memristors; Neuromorphics; Neurons; Training; memristors; neuromorphic network; spike-timing-dependent-plasticity;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nanotechnology (IEEE-NANO), 2011 11th IEEE Conference on
Conference_Location :
Portland, OR
ISSN :
1944-9399
Print_ISBN :
978-1-4577-1514-3
Electronic_ISBN :
1944-9399
Type :
conf
DOI :
10.1109/NANO.2011.6144522
Filename :
6144522
Link To Document :
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