DocumentCode
322870
Title
Reliability evaluation of chip-on-flex CSP devices
Author
Fillion, R.A. ; Burdick, Bill ; Piacente, P. ; Douglas, Lawrie ; Shaddock, David ; Saia, R.
Author_Institution
Gen. Electr. Corp. Res. & Dev. Center, Schenectady, NY
fYear
1998
fDate
15-17 Apr 1998
Firstpage
242
Lastpage
246
Abstract
The GE/Lockheed Martin chip-on-flex (COF) multichip module (MCM) technology was developed to address high volume commercial applications where cost and size are critical design requirements. Single chip versions of the COF MCM process evolved as a workaround for those applications that had not solved the known-good-die (KGD) cost and availability issues. This paper describes the design, fabrication, assembly, and evaluation of a COF CSP (chip scale package) device with a number of design options. The evaluation includes thin and thick under-bump metallization, mask-defined and nonmask-defined I/O pads, and I/O pads located within, near and beyond the perimeter of the chip over the plastic encapsulation. The devices are assembled on a PWB with mini ball grid array (BGA) solder balls stencil printed on the CSP devices. Both underfilled and nonunderfilled assemblies are evaluated. The environmental testing focuses on thermal cycling to induce solder fatigue. The objective of this effort is to quantify life cycle predictions for various COF CSP configurations under different environmental conditions
Keywords
encapsulation; environmental testing; fatigue; heat treatment; integrated circuit metallisation; integrated circuit packaging; integrated circuit reliability; integrated circuit testing; microassembling; soldering; thermal stresses; COF CSP configuration; COF CSP device assembly; COF CSP device design; COF CSP device fabrication; CSP devices; I/O pad location; ball grid array solder balls; chip scale package; chip-on-flex CSP devices; chip-on-flex MCM technology; chip-on-flex multichip module technology; environmental conditions; environmental testing; known-good-die; life cycle prediction; mask-defined I/O pads; nonmask-defined I/O pads; nonunderfilled assembly; package cost; package size; plastic encapsulation; reliability; solder fatigue; stencil printed solder balls; thermal cycling; under-bump metallization; underfilled assembly; Assembly; Chip scale packaging; Costs; Electronics packaging; Encapsulation; Fabrication; Metallization; Multichip modules; Plastics; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Multichip Modules and High Density Packaging, 1998. Proceedings. 1998 International Conference on
Conference_Location
Denver, CO
Print_ISBN
0-7803-4850-8
Type
conf
DOI
10.1109/ICMCM.1998.670787
Filename
670787
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