DocumentCode
3228848
Title
Timing the WCET of embedded applications
Author
Zhao, Wankang ; Kulkarni, Prasad ; Whalley, David ; Healy, Christopher ; Mueller, Frank ; Uh, Gang-Ryung
Author_Institution
Dept. of Comput. Sci., Florida State Univ., Tallahassee, FL, USA
fYear
2004
fDate
25-28 May 2004
Firstpage
472
Lastpage
481
Abstract
It is advantageous to not only calculate the WCET of an application, but to also perform transformations to reduce the WCET since an application with a lower WCET is less likely to violate its timing constraints. In this paper we describe an environment consisting of an interactive compilation system and a timing analyzer, where a user can interactively tune the WCET of an application. After each optimization phase is applied, the timing analyzer is automatically invoked to calculate the WCET of the function being tuned. Thus, a user can easily gauge the progress of reducing the WCET. In addition, the user can apply a genetic algorithm to search for an effective optimization sequence that best reduces the WCET. Using the genetic algorithm, we show that the WCET for a number of applications can be reduced by 7% on average as compared to the default batch optimization sequence.
Keywords
batch processing (computers); embedded systems; genetic algorithms; interactive systems; program compilers; batch optimization sequence; embedded applications; genetic algorithm; interactive compilation system; timing analyzer; worst-case execution time; Clocks; Costs; Distributed power generation; Embedded system; Genetic algorithms; Optical wavelength conversion; Performance analysis; Testing; Time factors; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Real-Time and Embedded Technology and Applications Symposium, 2004. Proceedings. RTAS 2004. 10th IEEE
ISSN
1545-3421
Print_ISBN
0-7695-2148-7
Type
conf
DOI
10.1109/RTTAS.2004.1317294
Filename
1317294
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