DocumentCode
3228888
Title
Design of turbo decoder based on Min-Sum decoding algorithm of LDPC code
Author
Wang, Pengjun ; Yi, Fanglong
Author_Institution
Inst. of Circuits & Syst., Ningbo Univ., Ningbo, China
fYear
2010
fDate
6-9 Dec. 2010
Firstpage
430
Lastpage
433
Abstract
Turbo code has been used by multiple communication standards due to its performance near Shannon limit. However, its decoding algorithm is complicated. Through the research on Turbo code, a novel design of Turbo decoder is presented in this paper. Turbo code is decoded by the Min-Sum decoding algorithm of LDPC code, which is a low complicated decoding algorithm. Moreover, messages are stored compressively, and the check-to-variable messages and the variable-to-check messages are stored alternately. This design reduced the required memory significantly. Finally, the decoder is simulated by ModelSim SE6.0 and the simulation results show that the decoder has high decoding speed.
Keywords
information theory; parity check codes; telecommunication standards; turbo codes; LDPC code; ModelSim SE6.0; Shannon limit; check-to-variable message; high decoding speed; min-sum decoding algorithm; multiple communication standard; turbo code; turbo decoder; variable-to-check message; Algorithm design and analysis; Decoding; Iterative decoding; Turbo codes; Decoder; LDPC; Min-Sum; Turbo;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (APCCAS), 2010 IEEE Asia Pacific Conference on
Conference_Location
Kuala Lumpur
Print_ISBN
978-1-4244-7454-7
Type
conf
DOI
10.1109/APCCAS.2010.5774882
Filename
5774882
Link To Document