Low voltage regulated cascode current mirrors suitable for sub-1V operation

Author

Vajpayee, Prateek ; Srivastava, A. ; Rajput, S.S. ; Sharma, G.K.

Author_Institution

ABV- Indian Inst. of Inf. Technol. & Manage., Gwalior, India

fYear

2010

fDate

6-9 Dec. 2010

Firstpage

584

Lastpage

587

Abstract

A modified regulated cascode structure that incorporate a push-pull inverting amplifier and having a low output compliance voltage is used in the implementations of proposed current mirrors. P-SPICE simulations in 0.25μm CMOS technology validate the proposed current mirror structures at 1V. They offer very high output impedance about 30GΩ, consume around 200μW of power at 100μA d.c. current, and offer low output compliance voltage of 0.2V. The use of a level shifter across input transistor reduces the input compliance voltage to 0.25V, this also reduces current transfer range that has been significantly improved (14nA-318μA) and input compliance voltage has been further reduced to 0.14V, when adaptive bias is employed. The proposed LVCMs can operate with sub-1V single supply.

Keywords

CMOS integrated circuits; current mirrors; low-power electronics; CMOS technology; P-SPICE simulations; current 100 muA; current 14 nA to 318 muA; current transfer range; level shifter; low output compliance voltage; low voltage regulated cascode current mirrors; modified regulated cascode structure; push-pull inverting amplifier; size 0.25 mum; voltage 0.14 V; voltage 0.2 V; voltage 0.25 V; voltage 1 V; Impedance; Inverters; Low voltage; Mirrors; Resistance; Threshold voltage; Transistors; Regulated cascode; adaptive bias; compliance voltage; current mirror; level shifter; push-pull inverting amplifier; switching threshold;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (APCCAS), 2010 IEEE Asia Pacific Conference on

Conference_Location

Kuala Lumpur

Print_ISBN

978-1-4244-7454-7

Type

conf

DOI

10.1109/APCCAS.2010.5774891

Filename

5774891