DocumentCode :
3229471
Title :
MeshWorks: An efficient framework for planning, synthesis and optimization of clock mesh networks
Author :
Rajaram, Anand ; Pan, David Z.
Author_Institution :
Univ. of Texas at Austin, Dallas
fYear :
2008
fDate :
21-24 March 2008
Firstpage :
250
Lastpage :
257
Abstract :
A leaf-level clock mesh is known to be very tolerant to variations (Restle et al., 2001). However, its use is limited to a few high-end designs because of the high power/resource requirements and lack of automatic mesh synthesis tools. Most existing works on clock mesh (Restle et al., 2001) either deal with semi-custom design or perform optimizations on a given clock mesh. However, the problem of obtaining a good initial clock mesh has not been addressed. Similarly, the problem of achieving a smooth tradeoff between skew and power/resources has not been addressed adequately. In this work, we present MeshWorks, the first comprehensive automated framework for planning, synthesis and optimization of clock mesh networks with the objective of addressing the above issues. Experimental results suggest that our algorithms can achieve an additional reduction of 26% in buffer area, 19% in wirelength and 18% in power, compared to the recent work of Venkataraman et al., (2006) with similar worst case maximum frequency under variation.
Keywords :
computer networks; MeshWorks; automatic mesh synthesis tools; clock mesh network optimization; clock mesh network planning; clock mesh network synthesis; leaf-level clock mesh; Clocks; Computer networks; Design optimization; Frequency; Instruments; Mesh networks; Microprocessor chips; Network synthesis; Optimized production technology; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2008. ASPDAC 2008. Asia and South Pacific
Conference_Location :
Seoul
Print_ISBN :
978-1-4244-1921-0
Electronic_ISBN :
978-1-4244-1922-7
Type :
conf
DOI :
10.1109/ASPDAC.2008.4483951
Filename :
4483951
Link To Document :
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