Title :
Random interface-traps-induced characteristic fluctuation in 16-nm high-к/metal gate CMOS device and SRAM circuit
Author :
Chen, Hui-Wen ; Chiu, Yung-Yueh ; Li, Yiming
Author_Institution :
Inst. of Commun. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
In this work, we study the interface traps (ITs) induced electrical characteristic and static noise margin (SNM) fluctuations in 16-nm-gate high-κ/metal gate complementary metal-oxide-semiconductor devices and static random asccess memory circuit. Totally random generated device samples with 2D ITs at silicon/HfO2 interface are simulated using an experimentally validated 3D device simulation. Random number and position of ITs and trap´s density on fluctuations of threshold voltage, on/off-state current and gate capacitance are explored and compared among process variation effect (PVE), random dopant fluctuation (RDF) and work function fluctuation (WKF). Notably, the position of ITs induces rather different fluctuation in spite of the same number of ITs.
Keywords :
CMOS memory circuits; SRAM chips; elemental semiconductors; hafnium compounds; interface states; silicon; work function; 2D IT; 3D device simulation; PVE; RDF; SNM; SRAM circuit; Si-HfO2; WKF; gate capacitance; high-κ-metal gate complementary metal-oxide-semiconductor device; high-K-metal gate CMOS device; on-off-state current; process variation effect; random dopant fluctuation; random interface-trap-induced characteristic fluctuation; size 16 nm; static noise margin; static random asccess memory circuit; threshold voltage fluctuation; trap density; work function fluctuation; CMOS integrated circuits; Fluctuations; Integrated circuit modeling; Logic gates; MOSFET circuits; Metals; Random access memory;
Conference_Titel :
Nanotechnology (IEEE-NANO), 2011 11th IEEE Conference on
Conference_Location :
Portland, OR
Print_ISBN :
978-1-4577-1514-3
Electronic_ISBN :
1944-9399
DOI :
10.1109/NANO.2011.6144566
