• DocumentCode
    3229560
  • Title

    An approach to quantum cost optimization in reversible circuits

  • Author

    Szyprowski, Marek ; Kerntopf, Pawel

  • Author_Institution
    Dept. of Electron. & Inf. Technol., Warsaw Univ. of Technol., Warsaw, Poland
  • fYear
    2011
  • fDate
    15-18 Aug. 2011
  • Firstpage
    1521
  • Lastpage
    1526
  • Abstract
    Recently, one of the main criteria used to evaluate reversible circuit designs is quantum cost. In this paper, an approach to reducing quantum cost of small-width reversible circuits is presented. Using our tool we have shown that for known benchmarks as well as designs taken from recent publications it is possible to obtain substantial savings in quantum cost (35% on average for 4-input benchmarks). It is also shown that quantum cost of 5-input circuits can be reduced using the same tool.
  • Keywords
    logic circuits; network synthesis; 4-input benchmarks; 5-input circuits; quantum cost optimization; reversible circuit design evaluation; reversible logic synthesis; Benchmark testing; Boolean functions; Databases; Heuristic algorithms; Libraries; Logic gates; Optimization; quantum cost; synthesis of reversible circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Nanotechnology (IEEE-NANO), 2011 11th IEEE Conference on
  • Conference_Location
    Portland, OR
  • ISSN
    1944-9399
  • Print_ISBN
    978-1-4577-1514-3
  • Electronic_ISBN
    1944-9399
  • Type

    conf

  • DOI
    10.1109/NANO.2011.6144568
  • Filename
    6144568