DocumentCode
3229670
Title
Non-Gaussian statistical timing analysis using second-order polynomial fitting
Author
Cheng, Lerong ; Xiong, Jinjun ; He, Lei
Author_Institution
Univ. of California, Los Angeles
fYear
2008
fDate
21-24 March 2008
Firstpage
298
Lastpage
303
Abstract
In the nanometer manufacturing region, process variation causes significant uncertainty for circuit performance verification. Statistical static timing analysis (SSTA) is thus developed to estimate timing distribution under process variation. However, most of the existing SSTA techniques have difficulty in handling the non-Gaussian variation distribution and non-linear dependency of delay on variation sources. To solve such a problem, in this paper, we first propose a new method to approximate the max operation of two non- Gaussian random variables through second-order polynomial fitting. We then present new non-Gaussian SSTA algorithms under two types of variational delay models: quadratic model and semi-quadratic model (i.e., quadratic model without crossing terms). All atomic operations (such as max and sum) of our algorithms are performed by closed-form formulas, hence they scale well for large designs. Experimental results show that compared to the Monte-Carlo simulation, our approach predicts the mean, standard deviation, and skewness within 1%, 1%, and 5% error, respectively. Our approach is more accurate and also 20times faster than the most recent method for non-Gaussian and nonlinear SSTA.
Keywords
Monte Carlo methods; integrated circuit modelling; nanotechnology; polynomial approximation; statistical analysis; timing; Monte-Carlo simulation; atomic operations; circuit performance verification; max operation; nanometer manufacturing region; non-Gaussian random variables; non-Gaussian statistical timing analysis; non-Gaussian variation distribution; process variation; second-order polynomial fitting; semi-quadratic model; timing distribution; variational delay models; CMOS technology; Circuit optimization; Delay lines; Fitting; Integrated circuit technology; Polynomials; Random variables; Semiconductor process modeling; Timing; Uncertainty;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2008. ASPDAC 2008. Asia and South Pacific
Conference_Location
Seoul
Print_ISBN
978-1-4244-1921-0
Electronic_ISBN
978-1-4244-1922-7
Type
conf
DOI
10.1109/ASPDAC.2008.4483962
Filename
4483962
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