DocumentCode :
3230404
Title :
Full-chip thermal analysis for the early design stage via generalized integral transforms
Author :
Huang, Pei-Yu ; Lin, Chih-Kang ; Lee, Yu-Min
Author_Institution :
Nat. Chiao Tung Univ., Hsinchu
fYear :
2008
fDate :
21-24 March 2008
Firstpage :
462
Lastpage :
467
Abstract :
The capability of predicting the temperature profile is critically important for circuit timing estimation, leakage reduction, power estimation, hotspot avoidance, and reliability concerns during modern IC designs. This paper presents an accurate and fast analytical full-chip thermal simulator for the early-stage temperature-aware chip design. By using the technique of generalized integral transforms (GIT), our proposed method can accurately estimate the temperature distribution of full-chip with very small truncation points of bases in the spatial domain. We also develop a fast Fourier transform (FFT) like evaluating algorithm to efficiently evaluate the temperature distribution. Experimental results confirm that our GIT based analyzer can achieve an order of magnitude speedup compared with a highly efficient Green´s function based method.
Keywords :
VLSI; fast Fourier transforms; integrated circuit design; integrated circuit modelling; integrated circuit packaging; fast Fourier transform; full-chip thermal analysis; generalized integral transforms; temperature distribution; temperature-aware chip design; Optical character recognition software; Quadratic programming;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2008. ASPDAC 2008. Asia and South Pacific
Conference_Location :
Seoul
Print_ISBN :
978-1-4244-1921-0
Electronic_ISBN :
978-1-4244-1922-7
Type :
conf
DOI :
10.1109/ASPDAC.2008.4483995
Filename :
4483995
Link To Document :
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