Pixel detector readout electronics with two-level discriminator scheme

In preparation for a silicon pixel detector with more than 3000 readout channels per chip for operation at the future Large Hadron Collider LHC at CERN the analog frontend of the readout electronics has been designed and measured on several test arrays with 16 by 4 cells. They are implemented in the HP 0.81 μm process but compatible with the design rules of the radiation hard Honeywell 0.8 mm bulk process. They contain bump bonding pad, preamplifier, discriminator and control logic for masking and testing in each cell. The layout area is only 50 μm by 140 μm per cell. A new two-level discriminator scheme has been developed to solve the problems of time-walk and interpixel cross-coupling. The measured gain of the preamplifier is 900 mV per minimum ionizing particle (MIP, about 24000 e^-) with a return to baseline within 750 ns for a 1 MIP input signal. The full readout chain shows an equivalent noise charge of 60 e^- r.m.s.. The time-walk is a function of the separation between the two threshold levels. With a separation of 1500 e^- a time-walk of 22 ns is measured. The interpixel cross-coupling is measured as less than 3%. A single cell is operated with 35 μW power consumption at 3.5 V supply voltage