DocumentCode :
3233048
Title :
Modeling and simulation of switching noise including power/ground plane resonance for high speed GaAs FET logic (FL) circuits
Author :
Jyh-Ming Jong ; Tripathi, V.K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
fYear :
1995
fDate :
16-20 May 1995
Firstpage :
1081
Abstract :
Equivalent circuit models of power/ground plane structures in high speed/frequency electronic packages used for switching noise and ground bounce simulation are presented. As an example, the effect of package resonance on the switching noise due to edge and clock rates of the GaAs FET logic (FL) inverter is reported for a typical MLC package.<>
Keywords :
circuit CAD; circuit analysis computing; equivalent circuits; field effect logic circuits; integrated circuit design; integrated circuit noise; integrated circuit packaging; logic gates; FET logic circuits; GaAs; MLC package; clock rates; edge rates; electronic packages; equivalent circuit models; ground bounce simulation; high speed circuits; inverter; package resonance; power/ground plane resonance; switching noise; Circuit noise; Circuit simulation; Clocks; Electronics packaging; Equivalent circuits; FETs; Frequency; Gallium arsenide; Resonance; Switching circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Symposium Digest, 1995., IEEE MTT-S International
Conference_Location :
Orlando, FL, USA
ISSN :
0149-645X
Print_ISBN :
0-7803-2581-8
Type :
conf
DOI :
10.1109/MWSYM.1995.406159
Filename :
406159
Link To Document :
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