• DocumentCode
    3233112
  • Title

    Device Characteristics with Potential Fluctuation Induced by Nonuniformity at Gate Oxide Interface with Multifractal Analysis

  • Author

    Ashizawa, Yoshio ; Tanabe, Ryo ; Oka, Hideki

  • Author_Institution
    Fujitsu Labs. Ltd., Tokyo
  • fYear
    2006
  • fDate
    6-8 Sept. 2006
  • Firstpage
    107
  • Lastpage
    110
  • Abstract
    Nonuniformity at the gate oxide interface is considered to be one of the serious fluctuation issues, which is induced by polysilicon grain boundary, impurity segregation, silicide and high-k stack. We introduce a mosaic layer at the gate oxide interface and relate the degree of the nonuniformity with device characteristics through multifractal analysis. There is an analogy between the degree of randomness and thermodynamics. More entropy increase in the mixture gives less variation in device characteristics. Finally, we discuss the allowable nonuniformity which is caused by unintended process variation in the view of pattern
  • Keywords
    elemental semiconductors; grain boundary segregation; impurity distribution; semiconductor device models; semiconductor doping; semiconductor-insulator boundaries; silicon; Si; device characteristics; gate oxide interface; high-k stack; impurity segregation; mosaic layer; multifractal analysis; polysilicon grain boundary; potential fluctuation; random dopant; silicide; thermodynamics; Doping; Fluctuations; Fractals; Grain boundaries; High K dielectric materials; High-K gate dielectrics; Impurities; Laboratories; Semiconductor process modeling; Tiles; component; grain boundary; high-k stack; multifractal; nonuniformity; polysilicon gate;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Simulation of Semiconductor Processes and Devices, 2006 International Conference on
  • Conference_Location
    Monterey, CA
  • Print_ISBN
    1-4244-0404-5
  • Type

    conf

  • DOI
    10.1109/SISPAD.2006.282849
  • Filename
    4061592