DocumentCode
3233457
Title
VHDL core for 1024-point radix-4 FFT computation
Author
Vite-Frias, J.A. ; Romero-Troncoso, Rd.J. ; Ordaz-Moreno, A.
Author_Institution
Fac. de Ingenieria Mecanica Electrica y Electronica, Univ. de Guanajuato, Salamanca
fYear
2005
fDate
28-30 Sept. 2005
Lastpage
24
Abstract
This paper shows the development of a 1024-point radix-4 FFT VHDL core for applications in hardware signal processing, targeting low-cost FPGA technologies. The developed core is targeted into a Xilinxreg Spartantrade -3 XC3S200 FPGA with the inclusion of a VGA display interface and an external 16-bit data acquisition system for performance evaluation purposes. Several tests were performed in order to verify FFT core functionality, besides the time performance analysis highlights the core advantages over commercially available DSPs and Pentium-based PCs. The core is compared with similar third party IP cores targeting resourceful FPGA technologies. The novelty of this work is to provide a low-cost, resource efficient core for spectrum analysis applications
Keywords
data acquisition; digital signal processing chips; fast Fourier transforms; field programmable gate arrays; hardware description languages; performance evaluation; spectral analysis; FPGA technologies; Spartan -3 XC3S200 FPGA; VGA display interface; VHDL core; Xilinx; external data acquisition system; field programmable gate array; hardware signal processing; performance evaluation; radix-4 FFT computation; spectrum analysis applications; time performance analysis; Data acquisition; Digital signal processing; Displays; Field programmable gate arrays; Hardware; Performance analysis; Performance evaluation; Personal communication networks; Signal processing; Testing; FFT; HSP; IP cores; VHDL;
fLanguage
English
Publisher
ieee
Conference_Titel
Reconfigurable Computing and FPGAs, 2005. ReConFig 2005. International Conference on
Conference_Location
Puebla City
Print_ISBN
0-7695-2456-7
Type
conf
DOI
10.1109/RECONFIG.2005.36
Filename
1592506
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