Hardware/software implementation of a discrete cosine transform algorithm using SystemC

This paper presents the development and modeling of a discrete cosine transform (DCT) algorithm using SystemC. The DCT algorithm is necessary to implement the signal compression subsystem for an ambulatory EEG system. Hardware/software co-design techniques were applied to optimize the DCT algorithm. The ambulatory system requires a DCT compression module capable of processing 32 channels. The DCT algorithm was first implemented totally in software (SW/SW). The large clock cycle count required to execute the SW/SW implementation motivated the partitioning of the DCT algorithm in hardware and software modules. The results, obtained by modeling the hardware and software modules using systemC, indicate the HW/SW implementation reduces the DCT´s algorithm execution time by 83.11%.