• DocumentCode
    3233561
  • Title

    Three-Dimensional Simulation of Intrinsic Stress Build-Up in Thin Films

  • Author

    Ceric, H. ; Hollauer, C. ; Selberherr, S.

  • Author_Institution
    Inst. for Microelectron., Technische Univ. Wien
  • fYear
    2006
  • fDate
    6-8 Sept. 2006
  • Firstpage
    192
  • Lastpage
    195
  • Abstract
    We present a method for prediction of stress in poly-SiGe thin films based on the texture evolution. Models for different stress generation mechanisms are discussed and integrated in an overall simulation scheme. As example a three-dimensional cantilever structure is used to demonstrate the introduced approach, and simulation results are successfully compared with experiment
  • Keywords
    Ge-Si alloys; grain boundaries; semiconductor materials; semiconductor thin films; stress effects; texture; SiGe; grain boundaries; intrinsic stress generation; texture; thin films; three-dimensional cantilever structure; three-dimensional simulation; Atomic layer deposition; Grain boundaries; Mathematical model; Micromechanical devices; Microstructure; Sputtering; Substrates; Temperature; Tensile stress; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Simulation of Semiconductor Processes and Devices, 2006 International Conference on
  • Conference_Location
    Monterey, CA
  • Print_ISBN
    1-4244-0404-5
  • Type

    conf

  • DOI
    10.1109/SISPAD.2006.282869
  • Filename
    4061612