• DocumentCode
    3234152
  • Title

    Theory of Fermi Level Pinning of High-k Dielectrics

  • Author

    Shiraishi, Kenji ; Takeuchi, Hideki ; Akasaka, Yasushi ; Watanabe, Heiji ; Umezawa, Naoto ; Chikyow, Toyohiro ; Nara, Yasuo ; Yamada, Keisaku ; Liu, Tsu-Jae King

  • Author_Institution
    Graduate Sch. of Pure & Appl. Phys., Tsukuba Univ., Ibaraki
  • fYear
    2006
  • fDate
    6-8 Sept. 2006
  • Firstpage
    306
  • Lastpage
    313
  • Abstract
    Fermi-level pinning of poly-Si and metal-silicide gate materials on Hf-based gate dielectrics has been systematically studied theoretically. Fermi-level pinning in high-work-function materials is governed by the O vacancy generation and subsequent formation of interface dipoles near gate electrodes due to the electron transfer. On the other hand, O interstitial formation plays a crucial role for Fermi-level pinning in low-work-function materials. From our theoretical considerations, we have found that the work-function pinning-free-region generally appears due the difference in the mechanism of Fermi-level pinning of high- and low-work-function materials. The widening of this work-function pinning-free-region is the key issue for the fundamental relaxation of Fermi-level pinning in high-k gate dielectric
  • Keywords
    Fermi level; elemental semiconductors; hafnium compounds; high-k dielectric thin films; interstitials; silicon; silicon compounds; tantalum compounds; tungsten compounds; vacancies (crystal); work function; Fermi level pinning; Si-SiO2-HfO2; TaSi2; WSi2; electron transfer; high-k gate dielectrics; high-work-function materials; interface dipoles; interstitial formation; metal-silicide gate materials; polysilicon materials; vacancy generation; Dielectric materials; Electrons; Hafnium oxide; High K dielectric materials; High-K gate dielectrics; Large scale integration; Lead compounds; Materials science and technology; Semiconductor materials; Silicides; Fermi-level pinning; O interstitial; O vacancy; component; flatband voltage shift; high-k dielectrics; interface dipoles; metal silicide gates; poly-Si gates; theory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Simulation of Semiconductor Processes and Devices, 2006 International Conference on
  • Conference_Location
    Monterey, CA
  • Print_ISBN
    1-4244-0404-5
  • Type

    conf

  • DOI
    10.1109/SISPAD.2006.282897
  • Filename
    4061640