Title :
3-D Process Simulation of CMOS Inverter Based on Selete 65nm Full Process
Author :
Fujinaga, M. ; Itoh, S. ; Mochiduki, M. ; Uchida, T. ; Ishikawa, H. ; Takenaka, M. ; Park, C.J. ; Asada, S. ; Shinzawa, T. ; Namekata, J. ; Wakahara, S. ; Wada, T.
Author_Institution :
Res. Dept., Semicond. Leading Edge Technol. Corp., Ibaraki
Abstract :
We have succeeded in 3-D process simulation of a CMOS inverter based on the Selete 65 nm full process. In particular, we have focused on the robustness and the availability of the process simulator HySyProS (Hyper Synthesized Process Simulator)
Keywords :
CMOS integrated circuits; invertors; semiconductor process modelling; 3D process simulation; 65 nm; CMOS inverter; HySyProS; hyper synthesized process simulator; Analytical models; CMOS process; Circuit simulation; Etching; Inverters; MOS devices; Oxidation; Robustness; Semiconductor device modeling; Surface topography; 3-D process simulation; CMOS full process; CMOS-inverter;
Conference_Titel :
Simulation of Semiconductor Processes and Devices, 2006 International Conference on
Conference_Location :
Monterey, CA
Print_ISBN :
1-4244-0404-5
DOI :
10.1109/SISPAD.2006.282912
