Semiconductor testing in the 21st century

With clock rates at a GHz + in the 21st century, a new and innovative method of verification for silicon devices must arise. It will eliminate the need for the massive numbers of blocked drivers and coax. It will lend versatility to parallel device test while reducing the overall cost and improving the throughput for a better bottom line. The new system will be up-gradable in speed and density very inexpensively. It will be much easier to install and give quicker time to market for new devices. This new method of testing will need some changes in attitude and thinking before it becomes a standard of test and measurement for the next century. The rewards for adopting this method early wilt be lower cost to market and a reduction in time to market. The author briefly describes such a method