Title :
The impact of bit-line coupling and ground bounce on CMOS SRAM performance
Author :
Ding, Li ; Mazumder, Pinaki
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
Abstract :
In this paper, we provide an analytical framework to study the inter-cell and intra-cell bit-line coupling when it is superimposed with the ground bounce effect and show how those noises impair the performance of SRAM. The impact of noises is expressed in term of a coupling noise degradation factor and a ground bounce degradation factor. We have used analytical techniques to reduce the governing nonlinear ordinary differential equations to some manageable form and have derived very simple formulas for those degradation factors. Experiments have shown that the results obtained using the derived simple formulas are in good agreement with HSPICE simulation.
Keywords :
CMOS memory circuits; SRAM chips; capacitance; integrated circuit modelling; integrated circuit noise; nonlinear differential equations; CMOS SRAM performance; coupling noise degradation factor; ground bounce degradation factor; ground bounce effect; inter-cell bit-line coupling; intra-cell bit-line coupling; nonlinear ordinary differential equations; simultaneous switching noise; static RAM; Circuit noise; Degradation; Delay effects; Differential equations; Integrated circuit modeling; Integrated circuit noise; Random access memory; Semiconductor device noise; Semiconductor memory; System performance;
Conference_Titel :
VLSI Design, 2003. Proceedings. 16th International Conference on
Print_ISBN :
0-7695-1868-0
DOI :
10.1109/ICVD.2003.1183143
